The present invention pertains to total security time-delay circuits, such as circuits which are employed in railway systems, specifically in order to permit distinguishing of fast and slow trains arriving at railway crossings, or, insofar as circuits for tracks may be concerned, time-delay circuits which are intended to prevent temporary reduction of shunt resistance levels between two rails.
It is essential for the aforementioned time-delay circuits to possess the specific characteristic of furnishing output signals in response to input signals after a specific minimum interval, which cannot be reduced even in the event of malfunctioning of a given component on account of problems in terms of reliability, whereby failure of a given component can only cause increasing of the lag affecting the output signal.
French Pat. No. 2,277,426 provides a description of a circuit of this type, and, according to said description, the circuit contains a pulse generator controlling operation of a contact breaker which is series-connected within a circuit likewise including a capacitor which is series-connected to the primary winding of a transformer. The signal provided at the terminals of the secondary winding of the transformer controls operation of another contact breaker which is installed so as to provide a voltage threshold which can be surpassed when adequate charging of the capacitor has occurred.
Although this type of circuit is satisfactory, it possesses the disadvantage of not furnishing total security in the previously indicated form, inasmuch as failure of the transistor which is used as the second contact breaker may result in a decreased lag, which is unfavorable in terms of reliability.